I. Field of the Invention
The present invention relates to a leadframe, and in particularly, to a leadframe forming a 3D space.
II. Description of the Prior Art
Lead frame is a material for IC package and can be in variety of forms such as QFP, TSOP, SOT or SOJ. The molded semiconductor devices are constructed by assembling and interconnecting a semiconductor device to a lead frame. The structure is often molded with plastic material. A lead frame is made by a metal ribbon with a paddle (also known as a die paddle, die-attach tab, or island) for attaching a semiconductor device thereto and a plurality of leads arranged in a manner such that the leads do not overlap the paddle on which the semiconductor device is to be mounted.
Conventionally, lead frame is used for die bond of an IC chip. The process flow includes many stages which comprise wire bond, molding of IC chip, and the tests after trimming or forming. Various products can be made by integrating or packaging the lead frame with other devices such as inductors or capacitors. It's one of the main package processes in the industry due to its easiness, maturity and better reliability.
The lead frame described above is usually in the form of plane so that product size doesn't shrink. Besides, it is only good for packaging a single device. However, when the size of the device shrinks, a leadframe having a 3D space for accommodating at least one device is needed. The deformation of the leadframe may further affect the product yield. Accordingly, the present invention proposes a leadframe and its manufacturing method to overcome the above-mentioned disadvantages.